Threshold voltage-related soft error degradation in a TFT SRAM cell

This is the first report of abnormal behavior in the soft error rate (SER) dependence on supply voltage (Vcc) for a bottom-gated polysilicon PMOS thin-film transistor (TFT) static random access memory (SRAM). We found that the TFT SER does not continuously improve (as is expected and desirable) with increasing Vcc when Vcc exceeds -Vth (threshold voltage) of the TFT within a range of about 0-2 V. This was confirmed with samples of TFT with Vth intentionally varied from 0 to -5 V (by adjusting channel doping). A possible explanation of this Vcc independence is proposed in the form of a SPICE simulation with as little as a 0.1-V TFT transient Vth shift due to the TFT's floating body. The accelerated SER was measured by using an Americium alpha particle source.