Unrolled layered architectures for non-surjective finite alphabet iterative decoders

This paper proposes cost efficient very high throughput layered decoding architecture for array quasi-cyclic Low-Density Parity-Check (QC-LDPC) codes, targeting tens of Gbps data rates. The targeted throughput is achieved by employing layer unrolling, with pipeline stages inserted in between layers. In order to obtain improved hardware efficiency for the decoder, multiple codewords are processed simultaneously. This leads to increased memory overhead. In order to reduce the associated cost, approximate message storage using Non Surjective-Finite Alphabet Iterative Decoding (NS-FAID) compression tables is employed. Cost efficiency is achieved by hardwired interconnects, compressed message storage using the NS-FAID, as well the A Posteriori Log-Likelihood Ratio (AP-LLR) message memory removal. Several compression tables are evaluated using the Throughput to Area Ratio (TAR) metric.