Old Web
English
Sign In
Acemap
>
Paper
>
A Fresh Design of Power Effective Adapted Vedic Multiplier for Modern Digital Signal Processors
A Fresh Design of Power Effective Adapted Vedic Multiplier for Modern Digital Signal Processors
2021
K. Gavaskar
D. Malathi
G. Ravivarma
V Krithika Devi
M. Megala
S Megaraj Begam
Keywords:
Computer hardware
Digital signal processor
Power (physics)
Multiplier (economics)
Computer science
Correction
Source
Cite
Save
Machine Reading By IdeaReader
24
References
0
Citations
NaN
KQI
[]