KEY TECHNOLOGIES FOR ~OO-MHZ VLSI TEST SYSTEM "ULTIMA"'

TIMING SUBSYSTEM This paper describes key technologies needed for constructing ULTIMATE, including an 8-ps resolution timing generator, a formatter with a real- time waveform control function, a 2.5-ps resolution standard comparator, and a miniaturized 3-GHz 59-pole channel selector. Almost all the pin-electronics hardware has been integrated on 12 kinds of LSIs, 8 of which are 2.5K-gate and 400-gate ultra-high speed bipolar gate arrays. ULTIMATE realizes 255 -ps overall timing accuracy by the timing calibration method which combines a standard comparator-based method and a TDR-based