Parameterized Model Order Reduction of Delayed PEEC Circuits

In this paper, we propose a novel parameterized model order reduction technique for circuits described by the delayed partial element equivalent circuit method. The moment vectors associated with frequency are excluded while forming the moments’ subspace. This leads to obtaining very compact parameterized reduced order models. An implicit multiparameter moment matching algorithm is used for the moments related to the design parameters. Numerical results validate the accuracy and efficiency of the proposed technique in both frequency- and time-domain. The time-domain response of the reduced order models is obtained using the numerical inversion of Laplace transform, which avoids stability issues as well as the computationally expensive repeated interpolation steps associated with conventional time-stepping integration method for delayed differential equations.