A Fast and Accurate True Event-driven Phase Locked Loop Model

This paper presents a fast and accurate event-driven modeling approach for mixed-signal phase locked loops (PLLs). To generate as few simulation events as possible a signal description is used, which utilizes linear combinations of analytical basic waveform sequences allowing the direct algebraic calculation of the analog circuit's response without using numeric integration. The PLL output provides a signal described in the spectral domain allowing to combine the PLL model with advanced RF simulation methods. The realized approach was implemented using a mixed System Verilog/C++ description and was used for verification purpose. The model correctness was verified against a reference transistor level simulation. The accuracy and speed-up was calculated and compared against other approaches.