Cell projection use in mask-less lithography for 45nm & 32nm logic nodes

Due to the ever-increasing cost of equipment and mask complexity, the use of optical lithography for integrated circuit manufacturing is increasingly more complex and expensive. Recent workshops and conferences in semiconductor lithography underlined that one alternative to support sub-32nm technologies is mask-less lithography option using electron beam technology. However, this direct write approach based on variable shaped beam principle (VSB) is not sufficient in terms of throughput, i.e. of productivity. New direct write techniques like multibeam systems are under development, but these solutions will not be mature before 2012. The use of character/cell projection (CP) on industrial VSB tools is the first step to deal with the throughput concerns. This paper presents the status of the CP technology and evaluates its possible use for the 45nm and 32nm logic nodes. It will present standard cell and SRAM structures that are printed as single characters using the CP technique. All experiments are done using the Advantest tool (F3000) which can project up to 100 different cells per layer. Cell extractions and design have been performed with the design and software solution developed by D2S. In this paper, we first evaluate the performance gain that can be obtained with the CP approach compared to the standard VSB approach. This paper also details the patterning capability obtained by using the CP concept. An evaluation of the CD uniformity and process stability is also presented. Finally this paper discusses about the improvements of this technique to address high resolution and to improve the throughput concerns.