Investigation of step-doped channel heterostructure field-effect transistor

1997 
A new heterostructure field-effect transistor (FET) with an InGaAs step-doped-channel (SDC) profile has been fabricated and demonstrated. The SDCFET studied provides the advantages of high current density, high breakdown voltage, wide gate voltage swing for high transconductance, and adjustable threshold voltage. A simple model is employed to analyse the performance of threshold voltage. For comparison two kinds of SDCFETs have been fabricated. For the 1 × 100 µm2 gated dimension, maximum drain saturation currents of 735 and 675 mA/mm, maximum transconductances of 200 and 232 mS/mm, gate breakdown voltages of 15 and 12 V, wide gate voltage swing of 3.3 and 2.6 V with transconductance gm higher than 150 mS/mm, and threshold voltage –3.7 and –1.8 V are obtained, respectively. These good performance figures show the SDCFET has good potential for high-speed, high-power circuit applications.
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    8
    References
    5
    Citations
    NaN
    KQI
    []