Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm 2 6T-SRAM bitcell

In this paper, we report on FD-SOI with high-k and single metal gate as a possible candidate for the 32 nm LOP and LSTP nodes. Good I on /I off performance for nMOS and pMOS transistors in the ultra-low-leakage regime (I off =6.6 pA/μm) are presented. In addition co-integration of high voltage devices with EOT 29A/V dd 1.8 V are made. For the first time, the functionality of 0.248 μm and 0.179 μm 2 6T-SRAM bit-cells is demonstrated on FDSOI technology with a high-k/metal gate stack.