Capacitance Measurements in Vertical III–V Nanowire TFETs
2018
By measuring scattering parameters over a wide range of bias points, we study the intrinsic gate capacitance as well as the charge partitioning of vertical nanowire tunnel field-effect transistors (TFETs). The gate-to-drain capacitance ${C} _{ {gs}}$ is found to largely dominate the ON-state of TFETs, whereas the gate-to-source capacitance ${C} _{ {gs}}$ is sufficiently small to be completely dominated by the parasitic components. This indicates that the tunnel junction on the source side almost completely decouples the channel charge from the small-signal variation in the source, while the absence of a tunnel junction on the drain side allows the channel charge to follow the drain small-signal variation much more directly.
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