Dielectric based charge carrier tuning for CNT CMOS inverters

The realization of Carbon nanotube (CNT) based CMOS compatible complementary logic circuits is one of the bottlenecks that needs to be overcome in order to consider CNTs as an alternative to silicon in future CMOS technology. In this work, we demonstrate complementary logic inverters using solution-processed CNTs. The type of charge carriers in the CNT field effect transistors (FET) have been tuned by changing the dielectric environment to realize both p-type and n-type CNTFETs. We have fabricated p-type CNTFETs using electron beam evaporated HfO2 as the top-gate dielectric and n-type CNTFETs using plasma enhanced chemical vapor deposition grown Silicon nitride as the top-gate dielectric. Using this fabrication approach, we realize high performance p- and n-CNTFETs employing regular metals such as Palladium for the source/drain contacts instead of rare earth metal contacts such as scandium. We demonstrate complementary logic inverters with a DC gain as high as 6.7 and operating voltages within 1 V.