CMOS Optoelectronic Sensor with Ping-pong Auto-zeroed Transimpedance Amplifier

This paper presents a new low power sensing architecture for fiber photometry applications. The proposed design consists of a CMOS photodiode, a differential low noise amplifier modified by a novel switched-gate ping-pong autozeroed architecture, an automatic phase alignment feedback, a demodulator, low-pass filter, and band-pass filter that are integrated on a CMOS chip. In the proposed design, employing precise phase adjustment channel and applying the switchedgate technique on ping-pong structure increase the sensitivity and remove the low frequency noise and offset with a low power consumption. Based on the post-layout simulation results with 0.18 µm CMOS technology at 1 kHz operating frequency, the transimpedance amplifier of the front-end detection unit has 40 dB gain, and a DC offset rejection factor of 16 dB and its input referred noise is 90 pA/√Hz. The lock-in amplifier has a sensitivity of 100 MV/A while consumes only 345 µW power from 1.8 V supply voltage and has an input detection range of 1 pA to 1nA. Besides, the results of the phase DAC of the automatic phase alignment feedback show that the DNL is less than 0.5 LSB, and the maximum INL is less than 1.2 LSB when the resolution is 15 bits that means the LSB is equal to 6.7 µs.