An Autonomic-Computing Approach on Mapping Threads to Multi-cores for Software Transactional Memory

A parallel program needs to manage the trade-off between the time spent in synchronisation andcomputation. This trade-off is significantly affected by its parallelism degree. A high parallelism degreemay decrease computing time while increasing synchronisation cost. Furthermore, thread placement onprocessor cores may impact program performance, as the data access time can vary from one core toanother due to intricacies of the underlying memory architecture. Alas, there is no universal rule to decidethread parallelism and its mapping to cores from an offline view, especially for a program with onlinebehaviour variation. Moreover, offline tuning is less precise. We present our work on dynamic control ofthread parallelism and mapping. We address concurrency issues via Software Transactional Memory (STM).STM bypasses locks to tackle synchronisation through transactions. Autonomic computing offers designersa framework of methods and techniques to build autonomic systems with well-mastered behaviours. Itskey idea is to implement feedback control loops to design safe, efficient and predictable controllers, whichenable monitoring and adjusting controlled systems dynamically while keeping overhead low. We implementfeedback control loops to automate management of threads and diminish program execution time.