High-sensitivity 1 Gbit/s CMOS receiver integrated with GaAs- or InGaAs-photodiode by wafer-bonding
2001
1 Gbit/s III-V/CMOS hybrid receivers consisting of a GaAs- or InGaAs-photodiode and a 0.5 µm CMOS receiver circuit have been realised by wafer-bonding. The circuit is simple and compact with high sensitivity and broad bandwidth due to the direct attachment of III-V PDs and the absence of any parasitic capacitance. Sensitivities of –27.4 and –28.0 dBm at 1 Gbit/s are demonstrated for 0.85 and 1.55 µm receivers, respectively.
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