An 85-mV input, 50-µs startup fully integrated voltage multiplier with passive clock boost using on-chip transformers for energy harvesting

A fully integrated voltage multiplier with low startup voltage (VSTART) and fast startup is developed for the energy harvesting (e.g. thermoelectric energy harvester). The generation of the high frequency clock signal with large amplitude without using off-chip components is a key to achieve the voltage multiplier. The proposed passive clock boost using two on-chip transformers with the winding turns ratio of three reduces VSTART. The 138-MHz clock generation with a fully integrated LC oscillator enables the fast startup. The voltage multiplier fabricated in 65-nm CMOS achieves the lowest cold VSTART of 85mV in the published fully integrated voltage multiplier and the shortest startup time of 50μs. I. INTRODUCTION A wide variety of distributed tiny wireless devices including sensor devices for Internet of Things (IoT), wearable wellness devices, and implanted medical devices require the energy autonomy. One of the key enabling technologies for the energy autonomous systems is the energy harvesting (1). The output voltage of the energy harvester, however, is often too low for the electronic devices. For example, the output voltage of the thermoelectric generator is in the range of 10mV/K to 50mV/K. For body-wearable applications, the output voltage is less than 100mV for the temperature difference of 2K. The single-cell solar cell generates 500-600mV in the outdoor and 100-200mV in the dark office environment. Therefore, a step- up DC-DC converter is required to boost the harvested (sub) 100mV to above 1V for the electronic devices. The key requirements for the low-input step-up DC-DC converter are (1) the fully integrated solution to reduce the size and the cost due to the off-chip components, (2) sub-100mV cold startup voltage (VSTART) for the thermoelectric generator and the single-cell solar cell in the dark office environment, and (3) sub-100μs startup time (tSTART) for the quick wake-up of the energy autonomous systems. Though the fully integrated solutions with the capacitive voltage multiplier were reported (2-4), VSTART of them are above 120mV, because they use CMOS ring oscillators to generate the clock for the voltage multiplier and the lower limit of VSTART is determined by the minimum supply voltage (VDDmin) of the ring oscillators (5). Theoretically, the lower limit of VDDmin is 36 mV at room temperature (6), but actually VDDmin is more than 100 mV due to manufacturing variations and large subthreshold slope (7). To solve the VDDmin problem, transformer-based oscillators and LC oscillators are proposed and boost converters with VSTART of less than 50mV were reported (8-10). The boost converters, however, require a bulky off-chip transformer (8, 9) or off-chip inductors (10), which are not the fully integrated solution. tSTART of the boost converter is 6ms (10), which is beyond our design target of sub-100μs, because the switching frequency of the boost converter is 25kHz. To achieve tSTART of sub-100μs, the frequency should be increased. In this paper, a fully integrated voltage multiplier with a passive clock boost using on-chip transformers is proposed to solve these problems. The voltage multiplier fabricated in a 65- nm CMOS process achieves the lowest cold VSTART of 85mV in the published fully integrated voltage multiplier and the shortest tSTART of 50μs. This paper is organized as follows. The clock generation techniques for the voltage multiplier with the passive clock boost using on-chip transformers are described in Section II. Section III shows the circuit implementation of the voltage multiplier. The experimental results are shown in Section IV. Finally, Section V concludes this paper.