Dynamic Feedback Linearizer of RF CMOS Power Amplifier

A dynamic feedback linearizer for an RF CMOS power amplifier (PA) is presented, which consists of a negative feedback network and a dynamic feedback control circuit to inject a reshaped envelope signal to the network. The linearizer compensates for the gain compression of the RF CMOS PA in high-power region by reducing the feedback dynamically, and it also reduces the amplitude-to-phase modulation (AM-PM) distortions. The PA including the linearizer was fabricated using a 0.18- $\mu \text{m}$ RF CMOS process, which has an output transmission-line transformer on a printed circuit board. It delivers an output power of 28.1 dBm at 1.7 GHz with power added efficiency of 40.9%, and adjacent channel leakage ratio (ACLR $_{\mathrm {E-UTRA}}$ ) of under −30 dBc for a 10-MHz 16-QAM long-term evolution signal without digital predistortions.