Circuit Design using New Online Testable Reversible CTSG

Reversible logic is emerging and a promising computing paradigm having its applications in low power VLSI design, quantum computing, cryptography, nanotechnology and optical computing. A new 4*4 reversible gate termed OTG (Online Testable Gate) and CTSG are designed suitable for online testability in reversible logic circuits. OTG can also work singly as a reversible full adder with a bare minimum of two garbage outputs. The OTG reversible gate is combined with the existing 4*4 Feynman gate to design online testable reversible circuits. In this paper a 9 CLB compact FPGA is designed using new CTSG logic. The CTSG can be operated as a universal NAND gate. The circuit complexity is reduced compared to the early proposed R1 gate and we can see the reduced delay of the circuits. Since the delay is reduced for the circuit we can say that the circuit can be used for high speed operation. The circuit design has been done using Xilinx ISE Design Suit 13.2. Keyword: reversible logic, online testability, high speed, FPGA,CTSG