Novel Stack-SIN Gate Dielectrics for High Performance 30 nm CMOS for 45 nm Node with Uniaxial Strained Silicon

2006 
Aggressively scaled 30nm gate CMOSFETs for 45nm node is reported. We successfully improved a higher drive current with keeping the short channel effect by Sigma shaped SiGe-source/drain (Sigma SiGe) structure using compressive-stressed liner. In addition, we developed novel stack-SIN gate dielectrics by using bis-tertiarybutylamino-silane (BTBAS)/NH 3 . Novel stack-SIN gate dielectrics show higher immunity to negative bias temperature instability (NBTI) and time-dependent dielectric breakdown (TDDB) lifetime compared with conventional plasma nitrided silicon dioxide. These characteristic are originated from its unique nitrogen profile. The nitrogen concentration is over 22% at the surface of the dielectric and it rapidly decreases to 1% at the interface with a substrate. A high performance 30 nm gate nMOSFET and pMOSFET were demonstrated with a drive currents of 1042 muA/mum and 602 muA/mum at V d = 1 V / Ioff=100 nA/mum, respectively
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