Microwave Characteristics Analysis of TWPD′s Using the FDTD Method

This paper suggests a 8-bit RISC microcontroller, which has a 4-stage pipeline architecture. Many low-power design techniques that have been proposed by previous works are adopted into it. The proposed microcontroller consumes only 600㎼ per MIPS for 0.6 CMOS process and even lower power of 70㎼ per MIPS for 0.25 process. The RTL level design of this microcontroller is carried out using VHDL. The functional verification is thoroughly done at the gate level using 0.6/0.25 CMOS IDEC standard cell library. This microcontroller contains 7000 NAND gates on a 0.36 die using 0.25 process. Finally the comparison of power consumption with other conventional microcontrollers is provided.