An ADD-Based Symbolic Analysis of Leakage Current in CMOS Circuits

As process geometries shrink, leakage currents are becoming an increasingly critical problem, particularly in full-custom circuit designs. Traditional circuit analysis techniques may be used to verify if leakage currents are within allowable limits. However, unless the analysis takes into account specific input constraints for the circuit, the results may be overly pessimistic. In this paper we target the leakage problem in CMOS circuits symbolically using Algebraic Decision Diagrams (ADDs). This ADD-based approach allows us to consider leakage as a function of a circuit’s inputs. Exclusivity constraints are easily included in the analysis, thus allowing for more accurate (and less pessimistic) results.