Low Power CMOS Featuring Dual Work Function FUSI on HfSiON and 17ps Inverter Delay

We report record unloaded ring oscillator delay (17ps at V DD = 1.1V and 20pA/mum I off ) using low power CMOS transistors with Ni-based fully silicided (FUSI) gates on HfSiON. This result comes from two key advancements over our previous report presented in A. Lauwers et al. (2005). First, we have improved the (unstrained) devices Idsat to be 560/245muA/mum for nMOS/pMOS at an I off = 20pA/mum and V DD =1.1V. Second, we demonstrate that the use of metal gates enables a reduction of the junction anneal temperature, yielding an Lg min reduction of 7nm/14nm for nMOS/pMOS over our poly-Si/SiON reference. We also report for the first time that metal gate on HfSiON devices can outperform optimized conventional poly-Si/SiON devices by up to 25% in unloaded ring oscillator speed. Finally, our study shows that there is no intrinsic difference between Ni-FUSI compared to inserted metal gates (TiN, TaN)