Real time architectures for sphericalized SVD updating

Publisher Summary This chapter develops a low complexity square root algorithm and a pseudo-systolic array architecture to track the dominant or subdominant singular subspace associated with time-varying data matrices in real time. The pseudo-systolic architectures are ideally suited for implementation with custom CORDIC VLSI or networks of available parallel numeric processing chips such as iWarps or TMS320C40's. The real time update complexity is O(n) where n is the data dimension. Further parallelization is possible to scale complexity down linearly as more processors are added. The chapter shows how to track the dimension of the signal subspace and gear-shift the array when the subspace dimension changes.