Physical modeling of the power VDMOST for computer-aided design of integrated circuit

This paper presents a methodology for physical modeling of the vertical double-diffused MOS transistor (VDMOST) for power-integrated-circuit (PIC) design. The circuit model comprises the regional models derived from basic semiconductor equations. The unique features of the VDMOST such as quasi-saturation, nonlinear inter-electrode capacitances, reverse-recovery current, and temperature dependencies are accurately modeled based on device simulations. The composite model is implemented in Saber and SPICE2G.6 source code. It is verified against steady-state and capacitance-voltage measurements on test devices. A parameter extraction routine is developed, and a system that links ICCAP and Saber is set up that performs measurement, simulation, and parameter extraction. The application of the described model in computer-aided design (CAD) is demonstrated for several power-electronic circuits.