Low temperature single electron characteristics in gate-all-around MOSFETs

This work reports on the fabrication, characterization and modeling of single electron transistor behavior in gate-all-around silicon nanoscale MOS devices. Polysilicon-gated nanowire transistors with triangular cross-sections, ranging from 20 to 250nm are fabricated by an original isotropic etching technique resulting in localized-SOI on bulk-Si wafers. Low temperature (T<20K) characteristics show Coulomb blockade in ID-VD and periodic oscillations in ID-VG. Two modeling approaches are discussed and critically compared to explain the experimental results: (i) orthodox theory of single electron transistor and (ii) one-dimensional sub-bands formation.