Memory with two access devices per phase change element

A memory has a bit line and a phase change element. A first side of phase change element is coupled to the bit line. The memory has a first access device, which is coupled to a second side of phase change element, and a second access device, which is coupled to the second side of phase change element. The memory includes a circuit for precharging the bit line and to select only the first access device to program the phase change element to a first state, or to select the first accessor and said second accessor to program the phase change element to a second state.