Level shift circuit

The present invention discloses a level shift circuit, it is an object: to suppress a through current is generated in the level shift circuit of a CMOS structure. The level of the CMOS structure consists of four transistors M1 ~ M4 basic configuration of the shift circuit 10, a control circuit is added to suppress the through current 20 thereof. The control input is low and so VS1 controlling N-type MOS transistor M7, M8 that OFF period (OFF period of switching), so that the complementary data input Vin1, Vin2 migration. , Separated from the pole VSS of the switch OFF during N-type MOS transistors M1, M2 of the respective sources. Further, during the switch is turned off by the control input VS2 is low and so controlling P-MOS transistors M5, M6 are turned on. Controlling the P-MOS transistor M5, M6 is turned on during that time, the data output Vout1 and Vout2 are precharged to VDD (precharge period) of these.