Dual SIMC-PI Controller Design for Cascade Implement of Input Resetting Control with Application

Input resetting control (IRC) is an economical and effective approach to achieve good closed-loop behavior for systems with extra inputs. The paper investigates use of the cascade IRC implementation. A SIMC-based controller tuning rule is proposed for first-order plus time delay (FOPTD) processes in the two-input–single-output (TISO) structure. Satisfactory regulatory capacities for both set-point tracking and input resetting are obtained. Both of the controllers are analytically derived with proportional-integral (PI) forms by proposing the equivalent transfer functions. The resulting tuning guideline shows how the adjustable parameters should be changed to balance a trade-off between performance specifications and levels of robustness. Numerical simulations have been carried out to demonstrate the effectiveness of the proposed method. Moreover, the feasibility of implementing the proposed control strategy in practice is verified by a light intensity control experiment.