Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chip

The reliability requirements of Flash memory become more and more challenging. Flash memory technology development needs test chips to allow large statistical studies and a product-like approach. In this paper, we present a methodology of bitmap analysis to extract and follow the intrinsic and extrinsic parameters of a 40nm eFlash technology during ramp-up. This methodology is, first, based on analog bitmap acquisition on 512kB test chip, followed by correction of spatial variabilities like peripheral circuits' influences, array organization impacts and process-induced effects, to extract supplementary cell electrical parameters such as threshold voltage, transconductance or programing window. Finally, such an analysis tool enhances the advantageous properties of a test chip, its large memory cell statistics and its product-like organization, to give more reliable data. It yields more information about intrinsic cell technology weaknesses and the best way to tackle them when integrated at product level.