Towards hole-spin qubits in Si pMOSFETs within a planar CMOS foundry technology.

Hole spins in semiconductor quantum dots represent a viable route for the implementation of electrically controlled qubits. In particular, the qubit implementation based on Si pMOSFETs offers great potentialities in terms of integration with the control electronics and long-term scalability. Moreover, the future down scaling of these devices will possibly improve the performance of both the classical (control) and quantum components of such monolithically integrated circuits. Here we use a multi-scale approach to simulate a hole-spin qubit in a down scaled Si-channel pMOSFET, whose structure is based on a commercial 22nm fully-depleted silicon-on-insulator device. Our calculations show the formation of well defined hole quantum dots within the Si channel, and the possibility of a general electrical control, with Rabi frequencies of the order of 100 MHz for realistic field values. Our calculations demonstrate the crucial role of the channel aspect ratio, and the presence of a favorable parameter range for the qubit manipulation.