Reliability Characteristics and Mechanisms of HRL’s T3 GaN Technology

HRL’s T3 GaN MMIC technology is evaluated using dc reliability experiments, including a voltage step-stress test, a temperature step-stress test, and a 3-temperature life test. The drain voltage step-stress test revealed three distinct regions of operation through gate leakage characteristic changes: burn-in stabilization up to 5 V, followed by stable operation up to 20 V, then voltage-dependent degradation up to catastrophic failure around 30 V. As a result, a de-rated recommended safe-operating limit of V ds = 12 V was established. The temperature step-stress test resulted in clear Arrhenius temperature-dependent degradation of the device on-resistance above 250 °C. Similarly, a recommended safe-operating limit of 150 °C was established for the technology. Finally, the 3-temperature life test resulted in clear temperature group separation and an activation energy of 2.52 eV, with a mean time-to-failure of 4 million hours at 150 °C with only a +0.2 ohm.mm increase in device on-resistance. Physical failure analysis of degraded parts showed the mechanism was a defect formation in the epitaxial barrier layer at the drain edge of the gate. Finite-element electrical simulations duplicated this degradation mechanism by modeling the defect as a void, which depleted the 2DEG and therefore increased device on-resistance.