Design Techniques for Low Power High Gain OTA Using Miller Circuit

The power consumption has become a critical issue, and hence a great attention and high importance is given to design of low voltage(LV) low power (LP) and high gain integrated circuits in last few decades. In order to achieve high performance analog circuits are usually combined with digital circuits in mixed signal systems. Opamp's are highly power hungry analog block used in large number of applications. Hence OTAs are preferred over Opamp. As technology scales down OTA design becomes more challenging since supply voltage scales down but keeping threshold voltage relatively constant. This paper deals with design of gate driven and bulk driven OTA using cadence virtuoso in 180nm technology with the supply voltage 1.6 V and 0.4 V respectively. Different performance parameter like DC gain, power consumption, transconductance, gain margin and phase margin, CMRR and unity gain bandwidth are analyzed.