From APE to APE-100: from 1 to 100 GFLOPS in lattice gauge theory simulations

1989 
Abstract We briefly describe the APE processor, a parallel computer currently used in lattice gauge simulations. We also present in greater details the architecture and the implementation of APE-100, a fine grained SIMD processors for lattice gauge theory simulations, similar in structure to APE and designed to provide floating-point performance in the 100 Gflops range.
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