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A 90nm Hybrid SOI CMOS Technology Integrating PDSOI and Bulk Devices for Bulk-designed MPU Performance Booster
A 90nm Hybrid SOI CMOS Technology Integrating PDSOI and Bulk Devices for Bulk-designed MPU Performance Booster
2005
S. Miyake
Takeshi Suzuki
T. Watanabé
O Fujita
N. Harada
K. Doumeki
T Fukai
T. Syo
T. Moriya
S. Haruta
Y. Takeshita
Makoto Ikeda
Kiyotaka Imai
Keywords:
Booster (rocketry)
Silicon on insulator
Electronic engineering
CMOS
Materials science
Electrical engineering
soi cmos technology
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