Design of Low Voltage Integrated CMOS RF front-end based LNA and Mixer for GPS Application

Abstract In this research article RF front-end is proposed which is important block of receiver system in wireless communication constituting Low Noise Amplifier (LNA) and Mixer block. It should necessarily have high Gain, good isolation, minimum noise figure, high stability and high linearity for optimum performance. This work is an attempt to develop the same. In proposed front-end, the LNA contains single differential topology including matching network. The Mixer is a switching block having Gilbert Down conversion topology. The CMOS RF front end is designed through Cadence spectre RF simulation in standard UMC 90 nm CMOS process at 1.575 GHz frequency which seeks its application in GPS receiver system. The parameters like Gain, input matching, output matching, reverse isolation and stability, noise figure, 1dB compression point, IIP3 and power consumption are examined for 1.5V input along with comparison of existing works.