Design of a 2-GSample/s Track-and-Hold Amplifier implemented in a 60-GHz SiGe BiCMOS Process

This paper presents an open-loop fully differential track-and-hold amplifier (THA) that employs switched emitter follower (SEF) architecture. With a highly linear buffer preceding the SEF structure, auxiliary SEF structure is not required. This reduction in THA structure complexity leads to a THA with a lower power consumption and smaller chip area. HSPICE simulations show that this THA circuit is capable of providing 10-bits of accuracy at the sampling speed of 2-GSample/s. Operating from a 3.5 V supply, the power consumption is 148 mW.