A Notch Prefilter for Three-Phase PLL under Adverse Grid Conditions

This paper presents a notch prefilter (NP) for phase locked loop (PLL). Similar to traditional notch filter (NF) and delayed signal cancellation (DSC) operator, the proposed NP can be easily tailored to completely eliminate harmonics. When the second order NF is used as in-loop filter, it may cause a delay time in the PLL control loop. The NP can overcome these drawbacks and achieve a better dynamic performance. For digital implementation, DSC operator may subject to delay time error. Moreover, the controller often needs to store many samples and may suffer from memory overflow. The NP does not cause such delay time error and the stored samples are greatly reduced. The proposed NP is analyzed and the effectiveness is verified by experiment in the paper.