3D stacking cobalt and nickel microbumps and kinetics of corresponding IMCs at low temperatures

To improve the performance of 3D electronic chips, dense I/O and interconnects are required. Increasing the density of interconnects requires smaller pitch micro-bumps. However, when scaling down microbumps several challenges have to be taken into account. Lithography of dense and high aspect ratio bump, wet etching of seed and barrier layer, solder volume and intermetallics (IMC) formation are some of the challenges that needs to be addressed. With reducing bump dimensions, solder volume decreases as well, converting Sn to complete IMC during the Thermo-Compression-Bonding (TCB) process. Full IMC formation increases stress in the joint, leading to crack formation and a brittle connection. Beside concerns about the IMC layer, the UBM (under bump metallization) consumption by the solder has to be addressed as well. Therefore, it is important to select the right UBM and solder to have enough Sn and UBM left in the joint for the time the product is working at a specific temperature [1].