A precise on-chip voltage generator for a giga-scale DRAM with a negative word-line scheme

We have designed a precise on-chip voltage generator for giga-scale DRAMs with a negative word-line scheme. It combines a charge-pump regulator and a series-pass regulator, and includes a positive/negative offset voltage generator that uses a band-gap generator with a differential amplifier. The noise on a low-voltage word-line is suppressed to below 30 mV for the word-line transient and VBB bouncing. A DC voltage error of less than 6% without trimming is also achieved.