FPGA Implementation of Elliptic Curve Point Multiplication over ( ૢ )

Hardware acceleration of cryptographic algorithms is beneficial be- cause considerable performance improvements can be attained compared to software implementations. Thus, hardware implementations can be used in crit- ical applications requiring high encryption or decryption speeds. Parallel archi- tecture with efficient hardware implementation of Galois field arithmetic operations is used to produce high speed computation time for the scalar mul- tiplication operation which is the main operation in Elliptic Curve Cryptogra- phy (ECC) system. This work proposed a modification in karatsuba-ofman algorithm which is one of the best algorithms used to perform multiplication operation over Galois field. The modification contrasted on truncating karatsu- ba-ofman algorithm in a low level and using the classic polynomial multiplica- tion algorithm. In addition, this work proposed architecture for implementing ECC on hardware using Montgomery algorithm in projective coordinates. The results show that the proposed architecture is able to compute GF(2^191) ellip- tic curve scalar multiplication operations in 72.939 µs on Xilinx Virtex-II XC2V6000 FPGA device and 100.68 µs on Xilinx VirtexE 2600. Also, the pro- posed architecture can be changed to be suitable for any arbitrary Galois field size with little modifications.