A 4 by 28.3 Gb/s SFI-S SerDes in 130 nm SiGe
2010
A 4 by 28.3 to 10 by 11.32 Gb/s SFI-S compliant two chip SerDes for 100 Gb/s applications was fabricated using IBM's SiGe 130 nm 8HP process (210 GHz fT). The Multiplexer receives 10 channels, plus the SFI-S deskew channel at 11.32 Gb/s, and outputs four lanes at 28.3 Gb/s, with a maximum output of 1.2 Vpp differential. The Demultiplexer receives four channels at 28.3 Gb/s, recovers clock and data with a sensitivity of 40 mV, and outputs 10 channels, plus the SFI-S deskew channel at 11.32 Gb/s.
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