A subnanosecond HEMT 1-kbit static RAM

The RAM has a memory capacity of 1024 bits and integrates 7244 high-electron-mobility transistor (HEMT) devices into 1024-words/spl times/1-bit organization. The RAM uses enhancement/depletion-type direct-coupled FET logic (DCFL) circuitry as a basic circuit and can operate fully statically. The design rules used are a 1.5-/spl mu/m minimum gate length, a 2/spl times/2-/spl mu/m/SUP 2/ contact hole, and a 3-/spl mu/m linewidth and spacing of the wiring electrodes. The memory cell is 55/spl times/39 /spl mu/m and the chip is 3.0/spl times/2.9 mm. The RAM is fabricated on an AlGaAs/GaAs heterojunction epi-structure grown by molecular beam epitaxy on a Cr-doped 2-in LEC GaAs substrate wafer. A subnanosecond access time of 0.87 ns with a 1.60-V supply and 360-mW dissipation has been attained at liquid nitrogen temperature.