Interfacing with cryogenic sensors via 180 nm CMOS operating near 1 Kelvin

We present a scheme to interface with cryogenic sensors using standard 180 nm CMOS ASIC operating near 1 K temperatures. The 180 nm CMOS technology is highly accessible and inexpensive, both desirable traits for large-scale cryogenic electronics operating in the sub-Kelvin range. We present results showing this technology’s viability at temperatures reaching below 100 mK and discuss design considerations in the overall architecture, power reduction strategy, and signaling choices.