Effects of Grain Boundary Barrier in ZnO/Si Heterostructure

The influence of ZnO microstructure on electrical barriers is investigated using capacitance-voltage (C – V), current-voltage (I – V) and deep level transient spectroscopy (DLTS) measurements. A deep level center located at Ec – 0.24 eV obtained by DLTS in the ZnO films is an intrinsic defect related to Zni. The surface states in the ZnO grains that have acceptor behavior of capturing electrons from Zni defects result in the formation of grain barriers. In addition, we find that the current transport is dominated by grain barriers after annealing at 600° C at O2 ambient. With the increment of the annealing temperature, the current transport mechanism of ZnO/Si heterostructure is mainly dominated by thermo-emission.