Fabrication of high Ge content SiGe-on-insulator with low dislocation density by modified Ge condensation

Abstract A SiGe-on-insulator (SGOI) structure with high Ge content and low density of dislocations is fabricated by a modified Ge condensation technique. The formation and elimination of stacking faults during condensation process are analyzed by transmission electron microscopy. A Si 0.19 Ge 0.81 OI substrate is fabricated utilizing two steps of oxidation and intermittent annealing. The time of oxidation or annealing at 900 °C is essential for the elimination of stacking faults in high Ge content SGOI substrate. The surface morphology of SGOI is investigated by atomic force microscopy and the defect density is evaluated from wet etching method. After the final condensation, the surface root-mean-square roughness (rms) of SiGe layer is kept below 1 nm and the threading defect density is controlled around 10 4  cm −2 . The smooth surface and integrated lattice structure of SiGe layer indicate that the SGOI is suitable for heteroepitaxial growth of strained Ge, GaAs and III–V compounds.