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Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture
Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture
2020
Ken Nakamura
Daisuke Kobayashi
Yuya Omori
Tatsuya Osawa
Takayuki Onishi
Koyo Nitta
Hiroe Iwasaki
Keywords:
Computer hardware
Engineering
low delay
Electronic engineering
parallel processing architecture
high frame rate
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