Compensation method for reducing power consumption in digital circuitry

Compensation circuit (300, 502) for reducing power consumption in at least one digital circuit (504) which is connected to the compensation circuit, for fluctuations in at least one of process or temperature conditions, which may be subjected to the digital circuit, wherein the compensation circuit comprises: a first sampling circuit (302), which is connected to a first supply voltage (VDD), wherein the first sampling circuit is operative throughout a specified range of process, supply voltage and temperature conditions; a second sampling circuit (304) coupled to a second supply voltage (VREG) is connected, wherein the second sampling circuit is configured to one or more performance characteristics of the at least to model a digital circuit, wherein the first and the second sampling circuit is substantially functionally equivalent to one another include, but are optimized for different regions of operation within the specified range of process, supply voltage and temperature conditions; and to receive a controller (309), which serves to corresponding output signals of the first and the second sample circuit so as to have a functionality of ...