A 3.1-dBm E -Band Truly Balanced Frequency Quadrupler in 22-nm FDSOI CMOS

This letter presents a truly balanced $E$ -band frequency quadrupler in 22 nm fully depleted silicon-on-insulator CMOS. The quadrupler comprises a chain of two truly balanced frequency push–push doubler (PPD). An innovative layout floorplan shrinks the silicon area utilization of the truly balanced PPDs by 30% and improves the state-of-the-art. Thanks to the balanced topology, the quadrupler achieves a high total efficiency of 2.9% in conjunction with conversion gain of 3.1 dB. The quadrupler exhibits a 3-dB bandwidth from 71 to 81 GHz with an output power of 3.1 dBm, and is therefore, suitable to be a local oscillator (LO) multiplier and driver at once. The chip draws only 70 mW while supplied from a single voltage of 0.8 V, and occupies 0.38 mm 2 of chip area.