Extremely low power c-axis aligned crystalline In-Ga-Zn-O 60 nm transistor integrated with industry 65 nm Si MOSFET for IoT normally-off CPU application

For the first time, laboratory 60 nm c-axis aligned crystalline In-Ga-Zn-O (CAAC-IGZO) oxide semiconductor FET (OSFET) was successfully integrated with industrial 65 nm Si MOSFET (SiFET). By this hybrid process, OSFET with extremely low off-state leakage level ∼zA (1×10 −21 A) was fabricated, while traditional Si device can only reach 1×10 −12 A leakage level. For IoT (Internet of Things) applications, normally-off CPU (Noff CPU) fabricated by this hybrid process achieved 86% reduction of power consumption. The hybrid process can be extended to other applications like eDRAM, image sensor and FPGA.