Dual-phase pipeline circuit design automation with a built-in performance adjusting mechanism
2011
The high speed dual phase operation domino circuit, which includes high-performance and reliable characteristics is proposed, and the circuit design technique with practical implementation is presented. The cell-based automatic synthesis flow supports the quick design of high performance chips. The test chip of a dual-phase 64 bit high-speed multiplier with a built-in performance adjustment mechanism is successfully validated using TSMC 0.18 technology. The test chip shows x2.7 performance improvement compared to the conventional static CMOS logic design.
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