Simulating Phase Noise in Multi-Gigahertz High Precision All-Digital Phase-Locked Loops

With the advances towards small technology nodes, high precision all-digital phase-locked loops in the multigigahertz range are becoming feasible. They are typically designed and simulated using event-driven simulators which introduce quantization in the time resolution and affect results of e.g. phase noise analysis. A fractional all-digital phase-locked loop and digitally controlled oscillator model serve as an example to highlight these effects. The simulator's quantization limit and its influence on high frequency, high precision signals are described. The effect is calculated analytically using a z-domain model of the system, treating the quantization as an additional noise source. To overcome the simulator's limitation, a time-domain rescaling is proposed and a System Verilog implementation presented. It is verified in simulation and by comparison to the expected results from the z-domain model.